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<div class="title">DWT_Type Struct Reference</div>  </div>
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<p>Structure type to access the Data Watchpoint and Trace Register (DWT).  
</p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:add790c53410023b3b581919bb681fe2a"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#add790c53410023b3b581919bb681fe2a">CTRL</a></td></tr>
<tr class="memdesc:add790c53410023b3b581919bb681fe2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x000 (R/W) Control Register.  <a href="#add790c53410023b3b581919bb681fe2a"></a><br/></td></tr>
<tr class="separator:add790c53410023b3b581919bb681fe2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a102eaa529d9098242851cb57c52b42d9"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a102eaa529d9098242851cb57c52b42d9">CYCCNT</a></td></tr>
<tr class="memdesc:a102eaa529d9098242851cb57c52b42d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x004 (R/W) Cycle Count Register.  <a href="#a102eaa529d9098242851cb57c52b42d9"></a><br/></td></tr>
<tr class="separator:a102eaa529d9098242851cb57c52b42d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2c08096c82abe245c0fa97badc458154"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a2c08096c82abe245c0fa97badc458154">CPICNT</a></td></tr>
<tr class="memdesc:a2c08096c82abe245c0fa97badc458154"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x008 (R/W) CPI Count Register.  <a href="#a2c08096c82abe245c0fa97badc458154"></a><br/></td></tr>
<tr class="separator:a2c08096c82abe245c0fa97badc458154"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9fe20c16c5167ca61486caf6832686d1"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a9fe20c16c5167ca61486caf6832686d1">EXCCNT</a></td></tr>
<tr class="memdesc:a9fe20c16c5167ca61486caf6832686d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x00C (R/W) Exception Overhead Count Register.  <a href="#a9fe20c16c5167ca61486caf6832686d1"></a><br/></td></tr>
<tr class="separator:a9fe20c16c5167ca61486caf6832686d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a416a54e2084ce66e5ca74f152a5ecc70"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a416a54e2084ce66e5ca74f152a5ecc70">SLEEPCNT</a></td></tr>
<tr class="memdesc:a416a54e2084ce66e5ca74f152a5ecc70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x010 (R/W) Sleep Count Register.  <a href="#a416a54e2084ce66e5ca74f152a5ecc70"></a><br/></td></tr>
<tr class="separator:a416a54e2084ce66e5ca74f152a5ecc70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acc05d89bdb1b4fe2fa499920ec02d0b1"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">LSUCNT</a></td></tr>
<tr class="memdesc:acc05d89bdb1b4fe2fa499920ec02d0b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x014 (R/W) LSU Count Register.  <a href="#acc05d89bdb1b4fe2fa499920ec02d0b1"></a><br/></td></tr>
<tr class="separator:acc05d89bdb1b4fe2fa499920ec02d0b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1cfc48384ebd8fd8fb7e5d955aae6c97"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97">FOLDCNT</a></td></tr>
<tr class="memdesc:a1cfc48384ebd8fd8fb7e5d955aae6c97"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x018 (R/W) Folded-instruction Count Register.  <a href="#a1cfc48384ebd8fd8fb7e5d955aae6c97"></a><br/></td></tr>
<tr class="separator:a1cfc48384ebd8fd8fb7e5d955aae6c97"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6353ca1d1ad9bc1be05d3b5632960113"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a6353ca1d1ad9bc1be05d3b5632960113">PCSR</a></td></tr>
<tr class="memdesc:a6353ca1d1ad9bc1be05d3b5632960113"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x01C (R/ ) Program Counter Sample Register.  <a href="#a6353ca1d1ad9bc1be05d3b5632960113"></a><br/></td></tr>
<tr class="separator:a6353ca1d1ad9bc1be05d3b5632960113"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a61c2965af5bc0643f9af65620b0e67c9"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a61c2965af5bc0643f9af65620b0e67c9">COMP0</a></td></tr>
<tr class="memdesc:a61c2965af5bc0643f9af65620b0e67c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x020 (R/W) Comparator Register 0.  <a href="#a61c2965af5bc0643f9af65620b0e67c9"></a><br/></td></tr>
<tr class="separator:a61c2965af5bc0643f9af65620b0e67c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a821eb5e71f340ec077efc064cfc567db"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a821eb5e71f340ec077efc064cfc567db">MASK0</a></td></tr>
<tr class="memdesc:a821eb5e71f340ec077efc064cfc567db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x024 (R/W) Mask Register 0.  <a href="#a821eb5e71f340ec077efc064cfc567db"></a><br/></td></tr>
<tr class="separator:a821eb5e71f340ec077efc064cfc567db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a579ae082f58a0317b7ef029b20f52889"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a579ae082f58a0317b7ef029b20f52889">FUNCTION0</a></td></tr>
<tr class="memdesc:a579ae082f58a0317b7ef029b20f52889"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x028 (R/W) Function Register 0.  <a href="#a579ae082f58a0317b7ef029b20f52889"></a><br/></td></tr>
<tr class="separator:a579ae082f58a0317b7ef029b20f52889"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:addd893d655ed90d40705b20170daac59"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#addd893d655ed90d40705b20170daac59">RESERVED0</a> [1]</td></tr>
<tr class="memdesc:addd893d655ed90d40705b20170daac59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved.  <a href="#addd893d655ed90d40705b20170daac59"></a><br/></td></tr>
<tr class="separator:addd893d655ed90d40705b20170daac59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a38714af6b7fa7c64d68f5e1efbe7a931"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a38714af6b7fa7c64d68f5e1efbe7a931">COMP1</a></td></tr>
<tr class="memdesc:a38714af6b7fa7c64d68f5e1efbe7a931"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x030 (R/W) Comparator Register 1.  <a href="#a38714af6b7fa7c64d68f5e1efbe7a931"></a><br/></td></tr>
<tr class="separator:a38714af6b7fa7c64d68f5e1efbe7a931"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aabf94936c9340e62fed836dcfb152405"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#aabf94936c9340e62fed836dcfb152405">MASK1</a></td></tr>
<tr class="memdesc:aabf94936c9340e62fed836dcfb152405"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x034 (R/W) Mask Register 1.  <a href="#aabf94936c9340e62fed836dcfb152405"></a><br/></td></tr>
<tr class="separator:aabf94936c9340e62fed836dcfb152405"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8dfcf25675f9606aa305c46e85182e4e"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a8dfcf25675f9606aa305c46e85182e4e">FUNCTION1</a></td></tr>
<tr class="memdesc:a8dfcf25675f9606aa305c46e85182e4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x038 (R/W) Function Register 1.  <a href="#a8dfcf25675f9606aa305c46e85182e4e"></a><br/></td></tr>
<tr class="separator:a8dfcf25675f9606aa305c46e85182e4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a069871233a8c1df03521e6d7094f1de4"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a069871233a8c1df03521e6d7094f1de4">RESERVED1</a> [1]</td></tr>
<tr class="memdesc:a069871233a8c1df03521e6d7094f1de4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved.  <a href="#a069871233a8c1df03521e6d7094f1de4"></a><br/></td></tr>
<tr class="separator:a069871233a8c1df03521e6d7094f1de4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5ae6dde39989f27bae90afc2347deb46"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a5ae6dde39989f27bae90afc2347deb46">COMP2</a></td></tr>
<tr class="memdesc:a5ae6dde39989f27bae90afc2347deb46"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x040 (R/W) Comparator Register 2.  <a href="#a5ae6dde39989f27bae90afc2347deb46"></a><br/></td></tr>
<tr class="separator:a5ae6dde39989f27bae90afc2347deb46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a00ac4d830dfe0070a656cda9baed170f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a00ac4d830dfe0070a656cda9baed170f">MASK2</a></td></tr>
<tr class="memdesc:a00ac4d830dfe0070a656cda9baed170f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x044 (R/W) Mask Register 2.  <a href="#a00ac4d830dfe0070a656cda9baed170f"></a><br/></td></tr>
<tr class="separator:a00ac4d830dfe0070a656cda9baed170f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1b60d6600c38abae515bab8e86a188f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#ab1b60d6600c38abae515bab8e86a188f">FUNCTION2</a></td></tr>
<tr class="memdesc:ab1b60d6600c38abae515bab8e86a188f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x048 (R/W) Function Register 2.  <a href="#ab1b60d6600c38abae515bab8e86a188f"></a><br/></td></tr>
<tr class="separator:ab1b60d6600c38abae515bab8e86a188f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8556ca1c32590517602d92fe0cd55738"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a8556ca1c32590517602d92fe0cd55738">RESERVED2</a> [1]</td></tr>
<tr class="memdesc:a8556ca1c32590517602d92fe0cd55738"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved.  <a href="#a8556ca1c32590517602d92fe0cd55738"></a><br/></td></tr>
<tr class="separator:a8556ca1c32590517602d92fe0cd55738"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a85eb73d1848ac3f82d39d6c3e8910847"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a85eb73d1848ac3f82d39d6c3e8910847">COMP3</a></td></tr>
<tr class="memdesc:a85eb73d1848ac3f82d39d6c3e8910847"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x050 (R/W) Comparator Register 3.  <a href="#a85eb73d1848ac3f82d39d6c3e8910847"></a><br/></td></tr>
<tr class="separator:a85eb73d1848ac3f82d39d6c3e8910847"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2a509d8505c37a3b64f6b24993df5f3f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a2a509d8505c37a3b64f6b24993df5f3f">MASK3</a></td></tr>
<tr class="memdesc:a2a509d8505c37a3b64f6b24993df5f3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x054 (R/W) Mask Register 3.  <a href="#a2a509d8505c37a3b64f6b24993df5f3f"></a><br/></td></tr>
<tr class="separator:a2a509d8505c37a3b64f6b24993df5f3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a52d4ff278fae6f9216c63b74ce328841"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a52d4ff278fae6f9216c63b74ce328841">FUNCTION3</a></td></tr>
<tr class="memdesc:a52d4ff278fae6f9216c63b74ce328841"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x058 (R/W) Function Register 3.  <a href="#a52d4ff278fae6f9216c63b74ce328841"></a><br/></td></tr>
<tr class="separator:a52d4ff278fae6f9216c63b74ce328841"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Field Documentation</h2>
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